[Development] Proposing to add (CPU) architecture maintainers

Shawn Rutledge Shawn.Rutledge at qt.io
Thu Aug 11 12:21:03 CEST 2022


I would like to get more familiar with RISC-V when I’ve got hardware for it, and might consider volunteering then.  (I don’t have any Qt-capable hardware yet, only the U540 microcontroller; but better stuff is starting to become available actually.)

As for POWER I do occasionally test on Debian on the old G5 machine, but not very often.  Builds take a long time, the GPU is not good for Qt Quick, and not all modules build and run, but at least qtbase is usually ok.

On 2022 Aug 11, at 11:59, JiDe Zhang <zccrs at live.com<mailto:zccrs at live.com>> wrote:

Hi, Will we accept add the other architectures? A example is Loongarch(Its from China). Will we expectation it is fully public?

________________________________
From: Development <development-bounces at qt-project.org<mailto:development-bounces at qt-project.org>> on behalf of Alex Blasche <alexander.blasche at qt.io<mailto:alexander.blasche at qt.io>>
Sent: Thursday, August 11, 2022 16:56
To: development at qt-project.org<mailto:development at qt-project.org> <development at qt-project.org<mailto:development at qt-project.org>>
Subject: Re: [Development] Proposing to add (CPU) architecture maintainers

> -----Original Message-----
> From: Development <development-bounces at qt-project.org<mailto:development-bounces at qt-project.org>> On Behalf Of
> Thiago Macieira
> Like I said in my email, we don't have the resources or knowledge to fix
> architectural-specific issues in those platforms, much less apply performance
> improvements. But we will accept patches in case we break anything.

Keeping the above in mind I would like to bring the thread back to
https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugreports.qt.io%2Fbrowse%2FQTBUG-103010&data=05%7C01%7C%7Cafc9f20096314d77e25708da7b77ad82%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637958051196070906%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=jTdX7H3q%2B%2B0CWHRdHtXrNqQyfLEvJkK89OgTcl1TtLE%3D&reserved=0

Currently POWER, MIPS, RISC-V and SPARC are open. Since this is an optimization task, I would argue that we close the subtasks for each of the mentioned platforms as Won't Do. Any objections?

And yes, we'll happily accept patches as outlined by Thiago.

--
Alex

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