[Development] Updating x86 SIMD support in Qt
Thiago Macieira
thiago.macieira at intel.com
Thu Jan 20 23:11:37 CET 2022
On Thursday, 20 January 2022 13:10:08 PST Lorn Potter wrote:
> well, from https://emscripten.org/docs/porting/simd.html
> "also turn on LLVM’s autovectorization passes, so no source
> modifications are necessary to benefit from SIMD."
> so emscripten's simd support is more than just sse2, sse3, etc.
True, but this is the autovectoriser. It operates on pure scalar C++ code and
applies what it can to speed up. Conceivably, the compiler knows what is fast
on the target environment and what isn't.
> well, CI doesn't build wasm simd, so in this respect, it doesn't concern me.
>
> 256-bit intrinsics won't work in wasm/emscripten so don't enable them
> for those platforms that don't support them like wasm.
>
> Just don't stop platforms from using 128bit intrinsics such as sse2.
Please see the code I'm submitting, like
https://codereview.qt-project.org/c/qt/qtbase/+/387217
https://codereview.qt-project.org/c/qt/qtbase/+/387414
https://codereview.qt-project.org/c/qt/qtbase/+/380895
That means:
* the new functions are inside an #ifdef __SSE2__ block
* the new functions' content and their calls are behind
if constexpr (UseAvx2) {
or
if constexpr (UseAvx256) {
* the new content uses __m256i among other things without #if
This is the request: if you #define __SSE2__, then you MUST provide __m256i
and the 256-bit x86 intrinsics (up to and including the new ones added in
AVX512). All or nothing.
You don't have to use them. They just need to be declared.
--
Thiago Macieira - thiago.macieira (AT) intel.com
Software Architect - Intel DPG Cloud Engineering
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