[Interest] building Qt 4.8.7 with gcc 5 and link-time optimisation on Linux

Thiago Macieira thiago.macieira at intel.com
Sat Jul 25 20:06:11 CEST 2015


On Saturday 25 July 2015 09:50:06 René J. V. Bertin wrote:
> > Because it can't be disabled in the compiler. It *always* generates those
> > instructions.
> 
> ...
> 
> > That's incorrect. SSE4.2 is enabled in your compiler because you're using
> > Apple's build of Clang.
> 
> I don't think it's as black-and-white as that ...

>From Clang's source code (lib/Driver/Tools.cpp):

  if (Triple.isOSDarwin()) {
    if (Triple.getArchName() == "x86_64h")
      return "core-avx2";
    return Is64Bit ? "core2" : "yonah";
  }

So I was right that it's black-and-white. I was wrong as to which CPU. 64-bit 
is enabling Intel Core 2 features, which implies SSSE3 support, not SSE 4.2 
(that would be Nehalem).

> >> Also, note that code that has to run on VMs may need to deactivate SSE4
> >> support. There is at least 1 virtualisation solution that does not expose
> >> the instruction set.
> > 
> > No VM will ever do that and run OS X code.
> 
> Try VirtualBox.

No need. The problem is not the VM, it's the OS X code. Given the above 
setting in Clang as well as the corresponding in GCC that Apple used to ship, 
Apple's code and EVERYONE's applications are built targeting the Intel Core 2.

> BTW, trying your expression on OS X 10.9 :
> 
> %> clang -dM -E -xc /dev/null | fgrep -i SSE
> #define __SSE2_MATH__ 1
> #define __SSE2__ 1
> #define __SSE3__ 1
> #define __SSE_MATH__ 1
> #define __SSE__ 1
> #define __SSSE3__ 1

This confirms it enables SSS3 by default, but not SSE4.1.

-- 
Thiago Macieira - thiago.macieira (AT) intel.com
  Software Architect - Intel Open Source Technology Center




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