[Interest] good-compromise compatibility setting for -march=??? option (x86)?
Thiago Macieira
thiago.macieira at intel.com
Tue Jul 21 07:46:36 CEST 2020
On Monday, 20 July 2020 21:50:45 PDT Rainer Wiesenfarth wrote:
> René would like to know how to set "march" when he *compiles code on* the
> Celeron (N3150) that should *run on* the (probably first generation) Core
> i7 mobile.
Oh? I had not understood that. But I was wondering why he was asking about
i7... there's no Atom that is marketed as i7.
Let me reread...
Sorry, I was confused then! René is looking for the maximum common denominator
between a Silvermont and a SandyBridge.
From some work I've been preparing to send to Qt:
# Architecture Based on New features
# Core line
arch=Core2 x86_64 sse3,ssse3,cx16
arch=NHM Core2 sse4.1,sse4.2,popcnt
arch=WSM NHM
arch=SNB WSM avx
arch=IVB SNB f16c,rdrnd,fsgsbase
arch=HSW IVB avx2,fma,bmi,bmi2,lzcnt,movbe
arch=BDW HSW adx,rdseed
[...]
# Atom line
arch=SLM WSM rdrnd,movbe
arch=GLM SLM fsgsbase,rdseed,lzcnt,xsavec,xsaves
So the common denominator of SLM and SNB is the WSM (Westmere).
Not coincidentally, it's the default -march= for GCC and Clang on Clear Linux,
as well as what all binaries in /usr/bin and /usr/lib64 are compiled towards.
Other combinations may not match an exact CPU, like:
SLM & IVB = WSM + rdrnd
SLM & HSW = SLM
GLM & HSW = SLM + fsgsbase
GLM & BDW = SLM + fsgsbase + rdseed
--
Thiago Macieira - thiago.macieira (AT) intel.com
Software Architect - Intel DPG Cloud Engineering
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