[Interest] Interest Digest, Vol 115, Issue 17
giuseppe.dangelo at kdab.com
Wed Apr 21 01:49:11 CEST 2021
On 20/04/2021 23:55, Roland Hughes wrote:
> On 4/20/2021 4:35 PM, Giuseppe D'Angelo wrote:
>> On 20/04/2021 15:10, Roland Hughes wrote:
>>> On 4/20/2021 5:00 AM, Giuseppe D'Angelo wrote:
>>>> On 18/04/2021 14:50, Roland Hughes wrote:
>>>>> I guess QML is more present in embedded? Or maybe some entreprise stuff
>>>>> we don't know about...
>>>>> Just phones and John Deere.
>>>> This is false, as a quick walk through the customer showcase on TQC's
>>>> website will show.
>>> It's completely true. That tiny subset on the Web site doesn't scratch
>>> the surface.
>> So there's even*MORE* QML used in embedded than what's advertised on
>> TQC's website? That's great news!
> I know it is difficult for you, but don't be an ass.
Or how about plain English? I'll put it in a better format:
"I guess QML is more present in embedded? Or maybe some entreprise stuff
we don't know about..."
"Just phones and John Deere."
"This is false, as a quick walk through the customer showcase on TQC's
website will show."
"It's completely true. That tiny subset on the Web site doesn't scratch
Conclusions from YOUR answer: there's many more people using QML than
the tiny subset of customers represented on TQC's website. "That tiny
subset on the Web site doesn't scratch the surface".
Which not only is what I was saying before; but it's also true, and it's
also in direct contradiction with "Just phones and John Deere.".
>> This is also false. SXs have never been defective CPUs.
>>> You need to actually learn processor history or at least do some
>>> research before you speak.
>> The 486SX was a marketing quirk. Intel had a high failure rate (low
>> yield) on the FPU. When a CPU passed DX testing it was sold as a 486DX.
>> When it failed testing it went down another line where they "cut some
>> pins" so the chip couldn't communicate with the bad FPU, put an SX on it
>> and sold scrap at a discount.
>> This has widely been debunked.
>> The SXs were introduced to the market_years_ after the introduction of
>> the DXs. Intel didn't start to have massive production problems all of a
>> sudden and thus decided to pull this stunt. The SXs were_designed_ to
>> have the FPU disabled, and their FPU was for this reason ever tested.
>> The only reason for the introduction of the SX was market segmentation
>> to compete against AMD.
>> Here's some links for you, given you seem to able to Google "486 sx
>> defective" (and leave it in the URLs that you link), but somehow
>> conveniently IGNORING the first couple of results, even if they include
>> first-hand accounts of Intel engineers who worked on the 486 that
>> disprove the whole defective story:
>> By the way, did you notice that the Wikipedia page that YOU linked
>> doesn't talk about those chips being "defective" DXs?
>> Because that's a lie, as discussed in the talk page:
> Nothing in your links debunks anything,
Yeah, right, don't read them, don't even quote sentences from them, and
try to disprove them.
> except your ability to do
Yay, personal insults, let's go!
> I was at Digital Equipment Corporation when they were
> designing their 486 "Dandy" The Digital Tandy and that is __exactly__
> what Intel told the engineers. It took more than a year of DX "low
> yield" before there was enough chips to make setting up a line to "fix"
> them worth while.
Ah ok. Thanks for NOT mentioning it before before dumping all the Google
results (well, all except the ones that disproved your thesis).
So, who should we believe?
On your left, witness A: an Intel engineer who claims to have directly
worked on the project. Now we can't easily verify that (and I don't want
to bother the person by writing directly). Witness A brings the
* The SX had been introduced 2 years after the DX, signalling no
production problems whatsoever (which if anything should've appeared
earlier in the process).
* The FPU had simply been disabled via a pin in the package. Technically
noone knows if they were _actually_ defective because they were not
tested at all, since the dies were built from the start to be SXs.
* The silicon process makes it very unlikely to get "just" a defective
FPU and not also affect the rest of the chip. And even if you get "just"
a defective FPU, a constant error in the fabrication process is not
something you would be fine with (the source of the defect may spread to
* The driving factor was offering a cheaper product in order to fight
competition from AMD (simple fact given the market shape at the time).
On your right: witness B, found to be lying multiple times in the past
(I like your selective quoting, by the way). Witness B says there's some
hearsay about this, back in the day, from someone at Intel. Now we can't
verify this either -- even in the crazy hypothesis of admitting hearsay
in court. But no other evidence is brought forward, nor any reasoning
about why such a thing even made sense. There's not even an attempt at
refuting the points of witness A.
If I was in the jury, I would have no doubts about which witness I'd
consider reliable and which one in contempt.
Giuseppe D'Angelo | giuseppe.dangelo at kdab.com | Senior Software Engineer
KDAB (France) S.A.S., a KDAB Group company
Tel. France +33 (0)4 90 84 08 53, http://www.kdab.com
KDAB - The Qt, C++ and OpenGL Experts
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